||From the Back Cover|This book describes novel methods for network-on-chip (NoC) design, using source-synchronous high-speed resonant clocks. The authors discuss NoCs from the bottom up, providing circuit level details, before providing architectural simul
This book describes novel methods for network-on-chip (NoC) design, using source-synchronous high-speed resonant clocks. It provides circuit-level details of the NoC and includes architectural simulations of the NoC.
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