| #5077885 in Books | 2014-10-15 | Original language:English | PDF # 1 | 9.21 x.69 x6.14l,.0 | File Name: 3319019961 | 260 pages
||From the Back Cover||This book provides a unified treatment of Flip-Flop design and selection in nanometer CMOS VLSI systems. The design aspects related to the energy-delay tradeoff in Flip-Flops are discussed, including their energy-optimal selection according
This book provides a unified treatment of Flip-Flop design and selection in nanometer CMOS VLSI systems. The design aspects related to the energy-delay tradeoff in Flip-Flops are discussed, including their energy-optimal selection according to the targeted application, and the detailed circuit design in nanometer CMOS VLSI systems. Design strategies are derived in a coherent framework that includes explicitly nanometer effects, including leakage, layout parasitics an...
[PDF.ia62] Flip-Flop Design in Nanometer CMOS: From High Speed to Low Energy Rating: 3.82 (465 Votes)
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You can specify the type of files you want, for your device.Flip-Flop Design in Nanometer CMOS: From High Speed to Low Energy | Massimo Alioto, Elio Consoli, Gaetano Palumbo. A good, fresh read, highly recommended.
