[PDF.28ls] Leman Design of Cost-Efficient Interconnect Processing Units:..* Marcello Coppola, Miltos D. Grammatikakis, Riccardo Locatelli, Giuseppe Maruccia, Lorenzo Pieralisi
[Read now] Leman Design of Cost-Efficient Interconnect Processing Units: Spidergon STNoC (System-on-Chip Design and Technologies)
☆ Marcello Coppola, Miltos D. Grammatikakis, Riccardo Locatelli, Giuseppe Maruccia, Lorenzo Pieralisi ☆
| #6932606 in Books | CRC Press | 2008-09-17 | Original language:English | PDF # 1 | 9.30 x1.00 x6.40l,1.45 | File Name: 1420044710 | 288 pages |
||About the Author|STMicroelectronics, Grenoble, France ISD SA, Heraklion, Greece STMicroelectronics, Grenoble Cedex, France Savant Company Inc, Irvine, California, USA
Streamlined Design Solutions Specifically for NoC To solve critical network-on-chip (NoC) architecture and design problems related to structure, performance and modularity, engineers generally rely on guidance from the abundance of literature about better-understood system-level interconnection networks. However, on-chip networks present several distinct challenges that require novel and specialized solutions not found in the tried-and-true system...
[PDF.hi63] Leman Design of Cost-Efficient Interconnect Processing Units: Spidergon STNoC (System-on-Chip Design and Technologies) Rating: 3.80 (638 Votes)
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