(Free read ebook) Constraining Designs for Synthesis and Timing Analysis: A Practical Guide to Synopsys Design Constraints (SDC)
☆ Sridhar Gangadharan, Sanjay Churiwala ☆
| #1797296 in Books | 2013-05-07 | Original language:English | PDF # 1 | 9.21 x.63 x6.14l,1.18 | File Name: 1461432685 | 226 pages
||3 of 4 people found the following review helpful.| I was very disappointed with this book|By Customer|I was very disappointed with this book, considering the price. I was hoping for some more detailed real world examples. The level of detail presented can just be found with some simple google searching.|0 of 0 people found the following review helpful.| Good book|By Noorav||From the Back Cover||This book serves as a hands-on guide to timing constraints in integrated circuit design. Readers will learn to maximize performance of their IC designs, by specifying timing requirements correctly. Coverage includes key aspects
This book serves as a hands-on guide to timing constraints in integrated circuit design. Readers will learn to maximize performance of their IC designs, by specifying timing requirements correctly. Coverage includes key aspects of the design flow impacted by timing constraints, including synthesis, static timing analysis and placement and routing. Concepts needed for specifying timing requirements are explained in detail and then applied to specific st...
[PDF.nn67] Constraining Designs for Synthesis and Timing Analysis: A Practical Guide to Synopsys Design Constraints (SDC) Rating: 4.68 (579 Votes)
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